The present invention relates to switch mode regulators and, more particularly, to a control circuit for implementing pulse width modulation within the switch mode regulator having precise control of amplitude and frequency.
Due to the decline in voltages and current requirements of conventional components, portable electronic devices have lower power requirements. The input voltage supplied to the circuitry within the portable electronic device must remain within specified voltage tolerances so that the circuitry can function reliably. The input voltage supplied by a power source, such as batteries, however, changes overtime due to contact corrosion, dissipation, temperature and other external environment conditions or changes thereof. To compensate for this problem, power converters are used to provide a constant supply of voltage to the circuitry within the prescribed voltage tolerances. The power converter receives the input voltage from the power source and converts it to a voltage within the prescribed voltage tolerance. The power converter maintains the voltage at its output which is coupled to the portable electronic device circuitry. The power converter includes circuitry to regulate the voltage of the power converter output within the voltage tolerances of the device circuitry even in the presence of wide deviations in the power source voltage.
The switch mode power converter is one such power converter that may be used in portable electronic device applications. The switch mode power converter is used to convert the power source signal to a higher or lower controlled voltage output. The switch mode power converter converts the DC voltage supplied by the power source into an AC signal in the form of a square or a sawtooth wave which is filtered to remove high frequencies. Afterwards, the AC signal is converted to a regulated DC output voltage.
A control circuit for generating pulse width modulation within the switch mode power converter functions as an oscillator which provides a periodic carrier signal comprising a sawtooth wave output signal VST having a predetermined constant period T. It controls the average power that is provided to a load coupled to the switch mode power converter by controlling the average voltage applied to the load. This is done by opening and closing a switch within the switch mode power converter in rapid fashion.
Illustrated in FIG. 1, a control circuit 10 for a conventional switch mode power converter uses a sawtooth reference voltage VST which includes an error amplifier 12 and a comparator 14 to generate a pulse width modulation (PWM) control signal VPWM. An error voltage VE is derived from the difference between the regulated output (feedback) voltage Vfb and the desired output voltage reference Vset. The error voltage VE and the sawtooth reference VST are fed into comparator 14 to provide PWM control VPWM. FIGS. 2a and 2b illustrate a graph of the PWM control signal VPWM and the sawtooth reference VST both as a function of time. Note that the duration of the resultant PWM control signal VPWM ends each cycle when the ramp voltage xe2x80x9ccrossesxe2x80x9d the error voltage VE.
To increase the usefulness of a control circuit 10 within a switch mode power converter, it is necessary to incorporate adjustability of the frequency of switching and discharge rate for sawtooth waveform VST. One such control circuit 20 for a switch mode power converter is illustrated in FIG. 3. Control circuit 20 includes a first and second comparator, 22 and 24, a voltage divider 26, a reset flip-flop circuit 28, a first and second feedback transistor, 30 and 32, a capacitor CT, and a first and second resistor, RT1 and DT1 . First resistor RT1 is used to set a reference charge current IC through current source IC1. Capacitor CT1 is used vary the charge time, which ultimately sets the frequency of converter 20. Second resistor DT1 sets the discharge current ID through current source ID1 The discharge time is a useful reference for xe2x80x9cbreak before makexe2x80x9d gate control of pulse width modulation regulators that employ a full or half H-bridge. The fine adjustability control circuit 20 offers is available to optimize bridge switching performance. In operation, comparators, 22 and 24, and reset flip-flop 28 alternate control circuit 20 between the charge and discharge cycles.
A problem occurs, however, at the end of a fast discharge cycle. The intrinsic propagation delay of comparator 24 causes undershoot of the low set point VM of sawtooth waveform VST signified by the node coupled to the negative input of comparator 24. FIG. 4a and 4b illustrate a graph of the sawtooth reference waveform VST and an expanded view of the sawtooth reference waveform VST, respectively, having a fast discharge cycle. As can be seen, the undershoot contributes to the error of amplitude VEA and frequency 1/TE to the sawtooth waveform VST. This problem is not derived from a fixed discharge rate, since the reference for the low set point comparator 24 may be offset as well. The design parameters require variability for the sawtooth waveform VST discharge cycle. Although the magnitude of the undershoot varies directly with the rate of discharge, a simple offset is not an effective solution. The undershoot is undesirable not only for the PWM control signal, VPWM but also for compensation networks within the switch mode regulator circuitry (not shown) that rely on a tightly controlled sawtooth waveform reference VST to optimize their performance. Fortunately, due to the relatively slow rate of the charge cycle, for the present example, overshoot error is not a factor. Overshoot error as shown in FIG. 8, however, may arise if the sawtooth waveform VST has a fast charge cycle and a slow discharge cycle.
Thus, a need exists for a control circuit within a switch mode power converter that does not exhibit overshoot error nor undershoot error during a fast charge cycle or a fast discharge cycle, respectively.
To address the above-discussed deficiencies of a switch mode power converter, the present invention teaches a control circuit for a switch mode power converter having precise control of amplitude and frequency that does not exhibit overshoot error nor undershoot error during a fast charge cycle nor a fast discharge cycle, respectively. In a first embodiment, the control circuit does not exhibit undershoot error during a fast discharge cycle. It comprises an oscillator for providing a periodic carrier signal comprising a sawtooth wave output signal. The oscillator includes a capacitor charged and discharged to the power supply voltage to provide the sawtooth wave output signal. In addition, the oscillator includes a switching circuit coupled to the reference voltage level. The control circuit includes a gain circuit having a reference voltage input, voltage input and an output. The reference voltage input receives the reference voltage and the voltage input connects to receive the sawtooth wave output signal. The output of the gain circuit connects to the switching circuit to provide feedback proportional to the analog error signal related to the difference between the sawtooth wave output signal and the predetermined reference voltage level.
The present approach can be similarly applied for a sawtooth waveform having a fast charge cycle and a slow discharge cycle. In a second embodiment, the control circuit does not exhibit overshoot error during a fast charge cycle. It includes similar components as the first embodiment, having slight modification.
Advantages of this design include but are not limited to a control circuit for a switch mode power converter that does not exhibit overshoot error nor undershoot error during a fast charge cycle or a fast discharge cycle, respectively.